Project Details
Projekt
RF-MEMScomponents, M-systems and hybrid integration
Applicant
Professor Dr.-Ing. Martin Hoffmann
Subject Area
Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
Term
from 2012 to 2020
Project identifier
Deutsche Forschungsgemeinschaft (DFG) - Project number 169536409
Part C1 of the research group MUSIK is responsible for the process integration and realization of RF MEMS devices into the silicon-LTCC substrate SiCer based on co-sintered silicon and LTCC with a unique nanostructured interface. SiCer is a joint invention of part C1 (silicon handling) and C2 (LTCC handling). In phase 2 the primary aim of this part C1 is the realization of the complete systems integration of a complex MUSIK RF demonstrator on SiCer substrate. For this, the technological platform for RF and MEMS components established in phase 1 is extended in a way that it allows the simultaneous manufacturing of all components and functional blocks on a single SiCer substrate in an integrated process. It should be highlighted that not only standard Si MEMS but also piezoelectric aluminum nitride (AlN) layers as active elements for e.g. resonators are included into this integrated process flow. This allows for a parallel integration of MEMS for switching, tuning and oscillating functional blocks into thesilicon of SiCer substrates. Besides applications for low RF signals (as in phase 1) these functions are extended for higher RF power levels in phase 2 (as required for transmitters) and thus a higher complexity of the circuits is required. Besides the development of suitable technological process integration a number of samples of functional blocks and of the demonstrator system are realized. This also includes a cooling of power components by using silicon-based structures as well as a direct electrical contacting of RF MEMS to the LTCC (without additional bond wires). In both cases, this is performed in close cooperation with part C2. Including also part C3 allows for a joint design and layout for LTCC and silicon pre and post processing based on the multiphysical synthesis as required for layout verification. Parallel to this, a number of iterative test structures is evaluated and realized in SiCer technology. This allows the project groups A and B an early verification of non-ideal effects of single mechanical systems (as shown in the networking matrix). These results will be used for an optimized modelling and system synthesis.
DFG Programme
Research Units
