DeCOP: Device-Circuit Co-Optimization for Reliable FeFET-based Brain-inspired Computing in the Face of Variability

• Applicants: Professor Dr.-Ing. Hussam Amrouch, Ph.D.; Professor Dr.-Ing. Ralf Brederlow
• Subject Area: Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
• Term: since 2024
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 547377347

Ferroelectric Field-Effect Transistors (FeFETs) represent an exciting frontier in the realm of beyond von Neumann computing due to its CMOS compatibility, unique ability to deliver ultra-low power, and nonvolatility. In the quest for advancing computing, integrating FeFETs with Spiking Neural Networks (SNNs) is a substantial leap forward. Their ability to program internal conductance and current drivability shows great promise for emulating synaptic weights, mirroring the foundational components (synapses, neurons) in biological brains. Nevertheless, variability poses a profound challenge because it leads to accuracy loses. Design-time variability seriously impacts the ability to accurately program the desired analogue state and run-time variability causes fluctuations/drifts in the programmed conductance during lifetime. On top of that, FeFETs additionally suffer from inherent stochasticity induced by the probabilistic switching nature of the underlying domains that form the ferroelectric layer. As a results, the various sources of variability significantly impair the performance and reliability of FeFETs leading to computational errors at both the circuit and system levels. To build reliable brain-inspired computing using FeFETs, this proposal aims to pioneer the development of variation-resilient NNs by developing innovative device-circuit co-optimization methods that keep the deleterious effects of process variation, temperature, and inherent stochasticity at bay. Our proposal encompasses multiple abstraction layers to combat variability and harness the potential of FeFETs in neuromorphic computing: (1) Device Physics: we will propose novel methods to model the joint impact of various variability sources on FeFETs, underpinned by rigorous Technology Computer-Aided Design (TCAD) simulations tightly coupled with physics-based FE models and then perform accurate validation against experimental measurements obtained from 22nm and 28nm FeFET wafers. (2) Circuit Design: we will introduce novel variability-aware circuit design techniques (beyond conventional crossbar architectures) to counterbalance variability effects, thereby bolstering the reliability of FeFET-based computing systems. (3) Algorithm Development: we will devise innovative methods for constructing variability-aware DL models, which will enable the proactive training of NNs in the presence of variability-induced errors to obtain robust DL models. (4) ASIC Validation: we will tape-out FeFET chips to validate our reliability models, demonstrate the effectiveness of our circuit design techniques, and quantify the robustness of our variability-aware NNs. By holistically addressing these four fundamental layers, our project seeks to pave the way for successful integration of FeFETs building reliable brain-inspired computing in the scope of the inescapable variability. Open source: We are committed to make our developed methods along with the validated FeFET models publicly available.

• DFG Programme: Research Grants