Rechnergestützter Entwurf von Signalprozessoren für Kommunikations-Terminals (A 6)

• Subject Area: Computer Architecture, Embedded and Massively Parallel Systems
• Term: from 1995 to 2004
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 5478635

No abstract available

• DFG Programme: Collaborative Research Centres
• Subproject of: SFB 358: System Design Automation - Synthesis - Test - Verification - Dedicated Applications
• Applicant Institution: Technische Universität Dresden
• Project Head: Professor Dr.-Ing. Gerhard P. Fettweis