Epitaxial Ge on SiGe buffer layers on porous Si templates - EpiPorT

• Applicant: Professor Dr. Andreas Bett
• Subject Area: Synthesis and Properties of Functional Materials ; Experimental Condensed Matter Physics
• Term: since 2023
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 514509471

After the semiconductor industry was dominated by silicon technology for many decades, interest in germanium has increased again in recent years. This is due to the fact that with decreasing device size (e.g. of MOSFETs) Si is reaching its limits in terms of conductivity or mobility of the free charge carriers. In this respect, Ge is a very attractive alternative because it has three times the mobilities and thus conductivitie of Si with the same doping. It is therefore of great interest, both from a scientific perspective and for the industry, to find a way to integrate thin (material saving) and high quality Ge directly on Si. Beyond the Si-based semiconductor industry, such a process could also become a bridge for the fabrication of III-V semiconductor electronic devices (such as LEDs or high-efficiency solar cells) on Si. To date, many III-V semiconductor stacks are hetero-epitaxially grown on Ge wafers due to good lattice matching. However, a thin layer of Ge on Si would be sufficient as a growth template for the III-V semiconductor stack.Matching the lattice constants from 5.431 Å (Si) to 5.658 Å (Ge), and thus integrating high-quality Ge layers on Si, can be realized using multiple metamorphic SixGe1-x interlayers. The technique of metamorphic interlayers for the growth of III-V semiconductors on Si has already been demonstrated in principle, but is limited by strain effects and numerous crystal defects.The EpiPorT approach is now to combine the growth of Ge on metamorphic SixGe1-x interlayers and the growth of Ge on porous Si. Both the porosified layer in the Si wafer and the epitaxially grown SixGe1-x interlayer are responsible for the exact lattice matching between Si wafer and active Ge layer. The thermal expansion coefficients of the two materials can also be matched using these two approaches. For porosification, an electrochemical etching method will be used. The SixGe1-x interlayer and the Ge will be deposited by atmospheric pressure chemical vapor deposition (APCVD) from Cl-based precursor gases (GeCl4, SiHCl3). This deposition method uses the high purity feedstock for all Ge technologies (GeCl4), utilizes the gas very efficiently, and results in high growth rates while maintaining very good crystallographic layer quality. The approach described in this proposal has not yet been realized and is therefore risky. However, should it lead to Si/SixGe1-x/Ge layers with improved crystallographic quality, it will open up a broad research field for the integration of Ge and III-V semiconductors on Si wafer technology.

• DFG Programme: Research Grants