Ultra-wideband highly linear Sampler and Analog-to-Digital Converter – DISCO

• Applicant: Professor Dr.-Ing. Friedel Gerfers
• Subject Area: Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
• Term: since 2022
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 509466514

This research proposal addresses the field of ultra-high-speed, wideband analog-to-digital converter (ADC) architectures with sample rates of 128 GS/s and beyond with target Nyquist signal bandwidth of at least 60 GHz while maintaining an effective number of bits (ENOB) of more than 6 to enable the next generation of fiber optics, radar and wireless communication systems with data rates of beyond 200 GBit/s per wavelength. To address these challenging performance metrics, a time-interleaved input-buffered inductively peaked track-and-hold (T/H) topology is investigated which applies a novel active bulk modulation technique. The architecture makes use of the enhanced back-gate capabilities of modern fully depleted silicon-on-insulator (FDSOI) technologies to implement an active negative-feedback bulk modulation scheme, thereby significantly enhancing the obtainable bandwidth while improving the front-end linearity at the same time. This enables monolithic integration and significantly reduced power concerns compared to state-of-the-art CMOS and SiGe BiCMOS approaches.For the following ADC core, a combination of Flash- and successive-approximation-register (SAR)-ADC is proposed, thereby combining the benefits of both, namely the conversion of multiple bits in a single clock cycle of the Flash-ADC and the SAR ADCs native power and area efficiency, in a two-step sub-ADC lane. Furthermore, the proposed SAR-ADC takes advantage of an advanced loop-unrolled topology to achieve ultra-fast conversion times. In addition, existing bandwidth limitations as well as time-interleaved sample phase mismatches are analyzed, modelled and calibrated using a mixed-signal approach, i. e. power-efficient digital correlation-based estimation of the bandwidth- and phase-errors while using an innovative analog correction with sub-femtofarad capacitor-tuning achieving phase shifts in the range of tens of femtoseconds.Successfully combining these innovations will open the door for significant performance improvements in terms of signal-to-noise ratio (SNR), spurious free dynamic range (SFDR), sample rate and signal bandwidth while at the same time improving the power efficiency compared to the current state-of-the-art, yielding outstanding potential for scientific and technological achievements.

• DFG Programme: Research Grants