Project Details
Band-Splitting Receiver Approaches for Wireless 6G Data-Communications up to 160 Gb/s (B A U D O T)
Subject Area
Communication Technology and Networks, High-Frequency Technology and Photonic Systems, Signal Processing and Machine Learning for Information Technology
Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
Term
since 2021
Project identifier
Deutsche Forschungsgemeinschaft (DFG) - Project number 458074433
Record data rates up to 120 Gb/s have been demonstrated for wireless RF-frontends by exploiting the large RF bandwidths available today. However, one key challenge is not solved yet. These ultra-fast wireless communication frontends do not include the digital baseband processing and analogue to digital converters (ADCs) on the system board. For the fastest systems, the digital processing functions and analogue to digital conversion are done by expensive, bulky, heavy and power-hungry lab measurement equipment. Hence, no full on board integration and no compact solutions are available today for wireless communications beyond 100 Gb/s. To solve this problem, we want to investigate in BAUDOT novel receiver approaches based on link virtualization by a smart hypervisors allowing the aggregation of several lower speed baseband modules that are in turn mapped onto band-splitting mixer-arrays. This approach can be combined with further band-splitting and multiplexer techniques in the antenna and baseband domains. Hence, the critical baseband and ADC modules operate at much lower speeds thereby reducing the overall energy consumption. To enable large bandwidths with high gain antennas, we target frequency bands around 200 GHz. One example implementation will be based on two 20 GHz antenna paths each split by the mixer array into four IQ paths a 5 GHz. Hence, a record overall receiver data rate of 2 × 20 GHz × 4 bit/s/Hz = 160 Gb/s is feasible with 16-QAM (quadrature amplitude modulation) while solely requiring baseband and ADC modules with moderate resolutions of 4-5 bits and relatively low bandwidth of only 5 GHz. The latter massively simplifies digital processing, packaging and system integration. The hypervisor will take care of the link virtualization i.e. the splitting of ultra-fast bit streams into several lower speed streams. The modularity allows a scalable approach and a power efficient implementation by performance-aware switching of the path modules. We target line of sight communication distances up to 5 m by using 4 × 4 antenna arrays with gain of around 17 dBi. These dielectric resonator antenna arrays are realized by back-side etching in silicon for integration on the chip. We aim at designing the RF-frontend in ultra-energy-efficient BiCMOS technology of IHP with record fmax (maximum frequency of oscillation) of up to 610 GHz. BAUDOT combines the multidisciplinary competences of Frank Ellinger in the area of millimetre-wave IC design and Rolf Kraemer regarding high-speed baseband, data link control, antennas and communication systems.
DFG Programme
Research Grants