Project Details
Projekt
Data-Center Technology: Hardware-Acceleration for In-Network Processing (D02*)
Subject Area
Security and Dependability, Operating-, Communication- and Distributed Systems
Term
since 2021
Project identifier
Deutsche Forschungsgemeinschaft (DFG) - Project number 210487104
The first two phases proposed the use of transitions in the layers above the hardware level. In Phase III, to further improve the performance, the hardware itself will be enabled to participate in transitions. To this end, subproject D2 investigates the design of and usage models for new specialized hardware architectures for switches and SmartNICs to allow In-Network Processing (INP) beyond the state-of-the-art. We aim for better QoS, as well as easier and more powerful programmability. The solutions achieved in D2 will be evaluated on use-cases from the Machine Learning and Big Data domains.
DFG Programme
Collaborative Research Centres
Applicant Institution
Technische Universität Darmstadt
Project Heads
Professor Dr. Carsten Binnig; Professor Dr.-Ing. Andreas Koch
