Sub-THz scalable Sensor-SoC

• Applicants: Professor Dr.-Ing. Dietmar Kissinger; Professor Dr.-Ing. Christian Waldschmidt
• Subject Area: Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
• Term: from 2017 to 2023
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 347375319

In recent years, the continuous advance in the silicon-based semiconductor technology has allowed first implementations of complete transceivers in millimeter-wave region. The main focus was on 60 GHz short range communication and 77 GHz automotive radar applications. SiGe BiCMOS as a combination of CMOS and silicon germanium (SiGe) technology offers the advantages of good high frequency characteristics with high integration level and low manufacturing cost. One of the major challenges in the current sensor research is opening up the frequency bands above 120 GHz into the THz range, which offers an unprecedented level of resolution and an extremely high miniaturization potential by the additional integration of the antenna structures.The obstacles of the realization of systems in these frequency regions lie in the output power and signal quality of the required integrated electronic signal sources as well as in the sensitivity of the integrated receivers or detectors. The previous research works on integrated signal sources in SiGe and CMOS at frequencies above 200 GHz are characterized by very low output powers. Recently first wafer-scale power combining systems in SiGe in the frequency range up to 100 GHz were introduced. These systems address the problem of low output power, but have no beamsteering functionality. Furthermore, phased-array transmitter frontends were presented. However, these previous works were characterized by a sub-optimal antenna array concept, which enables a good angular performance only by unnecessary effort.The goals of this research project are the studies of design of highly integrated flexible and scalable 320 GHz transceiver structures with beamforming functionality through an intelligent on-chip antenna array design using a highly modern SiGe BiCMOS technology. The studies include the design of minimum-redundancy arrays on individual MMICs as integrated sub-arrays. Arbitrarily large array arrangements can be generated by scaling these MMICs. The flexibility of the modulation scheme belongs also to the key issues of this project. Through additional circuit blocks, the new system should be able to be operated both as FMCW or Chirp Sequence as well as PN system (pseudo noise) in a MIMO-configuration.

• DFG Programme: Research Grants