COKE - Consistency Kernel - Software-Controlled Consistency and Coherency for Many-Core Architectures

• Applicants: Professor Dr.-Ing. Jörg Nolte; Professor Dr.-Ing. Wolfgang Schröder-Preikschat
• Subject Area: Security and Dependability, Operating-, Communication- and Distributed Systems
• Term: from 2012 to 2022
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 224615364

Increasing core numbers in modern processors more and more put classical, hardware-implemented cache coherence into question. At the same time, processor-internal high-speed networks provide the opportunity to shift methods for consistency preservation from hardware to operating and run-time systems. Central objective in the first phase of the COKE project therefore was the investigation and implementation of models for flexible dynamic sharing and the associated mechanisms for consistency preservation in the context of cache-incoherent many-core processors. In the second phase, the operations of the first phase shall be continued and extended to partitioned global address spaces (PGAS).Besides memory, the project foregrounds energy as additional managed resource. The pursued approach for energy-aware operation of many-core processors takes effect already at design time of software to uncover energy overhead early and contemplate for alternate implementations. Basis for this is the static analysis of programs in order to predict region-wise data for best-, average-, and worst-case energy consumption. At selected (compiler-generated) hand-over points, the estimated consumption is committed to an operating-system control unit to proactively respond at run-time on the load shape expected for the next execution phase of a program. This local characteristic of a process supports short-term scheduling in the system. In addition to this, for long-term scheduling, the operating system learns about the global characteristic of energy consumption at load time of the program. On the basis of the finally achieved measuring results, the software-implemented consistency protocols for the memory regions of a PGAS system will be graded into energy-performance classes.By acting on existent knowledge on software-controlled, operating-system supported global logical address spaces and logical shared memory for non-sequential applications the project encounters the basic assumption that the thus created scope of decision enables dynamic optimisation of execution at operating-system level, assisted by hints and regulating screws by the application. Challenged is the specific relation between energy efficiency, latency, and throughput of the logical shared memory and the data- and time-dependent application-level access patterns, the structure of the underlying hardware, and dynamic operational state. Also challenged is the common relation between the (in-house developed) new system and the (foreign-developed) legacy system as to applicability, portability, and generalisation of the engineered concepts and techniques.

• DFG Programme: Research Grants